Research Area:
Nanocomputing
Description
Nanocomputing, the use of nanometer-scale technologies for computation, presents important new algorithmic challenges. Self-assembly will replace traditional photolithography as a means to place circuit designs on chips. As a result, nanochips will have highly regular macrostructures but exhibit randomness at the lowest level. Among the new challenges are a) discovery of methods to assemble and control nanoscale devices, b) development of architectures and algorithms to make the best use of the I/O limitations that arise due to the disparity in wire sizes at the nano and microlevels, c) the design of new algorithms for the efficient use of highly structured, faulty nanoscale structures, and d) methods for containing the high fault rates associated with these very small devices.
Faculty
Topics or Projects
|
Page Owner: John Savage
|
Last Modified: Mon Oct 23 11:47:21 2006
|
