[Brown CS Talks] Brown CS Colloquium: Andre DeHon in Lubrano on December 12, 2002 at 4 pm

[talks@list.cs.brown.edu]

			   BROWN UNIVERSITY

		     COMPUTER SCIENCE COLLOQUIUM

				
			       presents

			 
			     Andre DeHon

		  California Institute of Technology

		 
		 Thursday, December 12,  2002 at 4 pm

	       Lubrano Conference Room (CIT 4th floor)

		Refreshments will be served at 3:45 pm
			      

    Array-Based Architecture for FET-based, Nanoscale Electronics

			       
			       Abstract

Advances in our basic scientific understanding at the molecular and
atomic scales now allow us to contemplate engineering designer
structures with key features at the single nanometer scale.  This
allow us to design computing systems at what may be the ultimate
limits on device size.  However, design at this scale will not simply
be an extension of our familiar VLSI design.  We may not be able to
directly pattern desired features, but rather must exploit basic
physical properties to define feature sizes, self-assembly to create
ordered devices, and post-fabrication reconfigurability to define
functionality.  This creates new challenges and exposes a different
cost structure which motivates different computing architectures than
we found efficient and appropriate in conventional VLSI.  I will
sketch a basic architecture for nanoscale electronics based on carbon
nanotubes, silicon nanowires, and nano-scale FETs.  This architecture
can provide universal logic functionality with all logic and signal
restoration operating at the nanoscale.


		     Host: Professor John Savage